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15 Publications
2022 | Dissertation | LibreCat-ID: 29769 | 
Hardware Trojans in Reconfigurable Computing
Q.A. Ahmed, Hardware Trojans in Reconfigurable Computing, Paderborn University, Paderborn, Germany, Paderborn, 2022.
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Q.A. Ahmed, Hardware Trojans in Reconfigurable Computing, Paderborn University, Paderborn, Germany, Paderborn, 2022.
2021 | Dissertation | LibreCat-ID: 26746 |
Guaranteeing Properties of Reconfigurable Hardware Circuits with Proof-Carrying Hardware
T. Wiersema, Guaranteeing Properties of Reconfigurable Hardware Circuits with Proof-Carrying Hardware, Paderborn University, Paderborn, 2021.
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T. Wiersema, Guaranteeing Properties of Reconfigurable Hardware Circuits with Proof-Carrying Hardware, Paderborn University, Paderborn, 2021.
2021 | Journal Article | LibreCat-ID: 27841
Software/Hardware Co-Verification for Custom Instruction Set Processors
M.-C. Jakobs, F. Pauck, M. Platzner, H. Wehrheim, T. Wiersema, IEEE Access (2021).
LibreCat
| DOI
M.-C. Jakobs, F. Pauck, M. Platzner, H. Wehrheim, T. Wiersema, IEEE Access (2021).
2020 | Journal Article | LibreCat-ID: 17358
Proof-carrying Approximate Circuits
L.M. Witschen, T. Wiersema, M. Platzner, IEEE Transactions On Very Large Scale Integration Systems 28 (2020) 2084–2088.
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| DOI
L.M. Witschen, T. Wiersema, M. Platzner, IEEE Transactions On Very Large Scale Integration Systems 28 (2020) 2084–2088.
2019 | Preprint | LibreCat-ID: 16853
Jump Search: A Fast Technique for the Synthesis of Approximate Circuits
L.M. Witschen, H. Ghasemzadeh Mohammadi, M. Artmann, M. Platzner, Fourth Workshop on Approximate Computing (AxC 2019) (n.d.).
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L.M. Witschen, H. Ghasemzadeh Mohammadi, M. Artmann, M. Platzner, Fourth Workshop on Approximate Computing (AxC 2019) (n.d.).
2018 | Bachelorsthesis | LibreCat-ID: 1097
Enforcing IP Core Connection Properties with Verifiable Security Monitors
F.P. Jentzsch, Enforcing IP Core Connection Properties with Verifiable Security Monitors, Universität Paderborn, 2018.
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F.P. Jentzsch, Enforcing IP Core Connection Properties with Verifiable Security Monitors, Universität Paderborn, 2018.
2014 | Conference Paper | LibreCat-ID: 36917
An Assisted Single Source Verification Metric Model Code Generation Methodology
C. Kuznik, W. Müller, G.B. Defo, in: San Francisco, USA, 2014.
LibreCat
C. Kuznik, W. Müller, G.B. Defo, in: San Francisco, USA, 2014.
2014 | Conference Paper | LibreCat-ID: 34585
Fast and Open Virtual Platforms for TriCore-based SoCs Using QEMU
B. Koppelmann, B. Messidat, M. Becker, W. Müller, J.C. Scheytt, in: Proceedings of the Design and Verification Conference Europe (DVCON Europe), München, 2014.
LibreCat
B. Koppelmann, B. Messidat, M. Becker, W. Müller, J.C. Scheytt, in: Proceedings of the Design and Verification Conference Europe (DVCON Europe), München, 2014.
2008 | Conference Paper | LibreCat-ID: 2370
EvAnT: Analysis and Checking of event traces for Wireless Sensor Networks
M. Woehrle, C. Plessl, R. Lim, J. Beutel, L. Thiele, in: IEEE Int. Conf. on Sensor Networks, Ubiquitous, and Trustworthy Computing (SUTC), IEEE Computer Society, Los Alamitos, CA, USA, 2008, pp. 201–208.
LibreCat
| DOI
M. Woehrle, C. Plessl, R. Lim, J. Beutel, L. Thiele, in: IEEE Int. Conf. on Sensor Networks, Ubiquitous, and Trustworthy Computing (SUTC), IEEE Computer Society, Los Alamitos, CA, USA, 2008, pp. 201–208.
2007 | Conference Paper | LibreCat-ID: 2393
Automated Wireless Sensor Network Testing
J. Beutel, M. Dyer, R. Lim, C. Plessl, M. Woehrle, M. Yuecel, L. Thiele, in: Proc. Int. Conf. Networked Sensing Systems (INSS), IEEE, Piscataway, NJ, USA, 2007, pp. 303–303.
LibreCat
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J. Beutel, M. Dyer, R. Lim, C. Plessl, M. Woehrle, M. Yuecel, L. Thiele, in: Proc. Int. Conf. Networked Sensing Systems (INSS), IEEE, Piscataway, NJ, USA, 2007, pp. 303–303.
2004 | Conference Paper | LibreCat-ID: 39069
Past- and Future-Oriented Time-Bound Temporal Properties with OCL
S. Flake, W. Müller, in: Proceedings of SEFM´04, IEEE, Beijing, China, 2004.
LibreCat
| DOI
S. Flake, W. Müller, in: Proceedings of SEFM´04, IEEE, Beijing, China, 2004.
2002 | Conference Paper | LibreCat-ID: 39382
The Formal Execution Semantics of SpecC
W. Müller, R. Dömer, A. Gerstlauer, in: Proceedings of the ISSS02, Nagoya, Japan, 2002.
LibreCat
| DOI
W. Müller, R. Dömer, A. Gerstlauer, in: Proceedings of the ISSS02, Nagoya, Japan, 2002.
2002 | Conference Paper | LibreCat-ID: 39403
Specification of Real-Time Properties for UML Models
S. Flake, W. Müller, in: Proceedings of HICSS-35, Big Island, HI, USA , 2002.
LibreCat
| DOI
S. Flake, W. Müller, in: Proceedings of HICSS-35, Big Island, HI, USA , 2002.
2001 | Conference Paper | LibreCat-ID: 39421
The Simulation Semantics of SystemC
W. Müller, J. Ruf, D.W. Hoffmann, J. Gerlach, T. Kropf, W. Rosenstiehl, in: Proceedings of the Design, Automation, and Test in Europe (DATE’01), IEEE, Munich, Germany , 2001.
LibreCat
| DOI
W. Müller, J. Ruf, D.W. Hoffmann, J. Gerlach, T. Kropf, W. Rosenstiehl, in: Proceedings of the Design, Automation, and Test in Europe (DATE’01), IEEE, Munich, Germany , 2001.
1995 | Book Chapter | LibreCat-ID: 34448
A Formal Definition of an Abstract VHDL'93 Simulator by EA-Machines
E. Börger, U. Glässer, W. Müller, in: C. Delgado Kloos, P.T. Breuer (Eds.), Semantics of VHDL, Kluwer Academic Publishers, Dordrecht, 1995, pp. 107–139.
LibreCat
| DOI
E. Börger, U. Glässer, W. Müller, in: C. Delgado Kloos, P.T. Breuer (Eds.), Semantics of VHDL, Kluwer Academic Publishers, Dordrecht, 1995, pp. 107–139.